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DP83867CS 데이터시트(PDF) 78 Page - Texas Instruments

부품명 DP83867CS
상세설명  DP83867E/IS/CS Robust, High Immunity, Small Form Factor 10/100/1000 Ethernet Physical Layer Transceiver
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7.6.35 100BASE-TX Configuration (100CR)
Table 7-45. 100BASE-TX Configuration Register (100CR), Address 0x0043
BIT
BIT NAME
DEFAULT
DESCRIPTION
15:12
RESERVED
0, RO
RESERVED
11
DESCRAM_TIMEOUT_DIS
0, RW
Disable 100Base-TX Descrambler Timeout:
1 = Disable packet reception when received packet violates the
descrambler timeout. This occurs when the packet is longer than
1.5ms.
0 = Stops packet reception when received packet violates the
descrambler timeout. This occurs when the packet is longer than
1.5ms.
10:7
DESCRAM_TIMEOUT
1111, RW
Descrambler Timeout:
Adjust the descrambler time out value. This value refers to the
recovery time due to descrambler unlock. Timer is in ms units.
6
FORCE_100_OK
0, RW
Force 100Mbps Good Link:
1 = Forces 100Mbps good link.
0 = Normal operation.
5
ENH_MLT3_DET_EN
1, RW
Enhanced MLT-3 Detection Enable:
1 = Enable enhanced MLT-3 Detection.
0 = Normal operation.
4
ENH_IPG_DET_EN
0, RW
Enhanced Interpacket Gap Detection Enable:
1 = Enable enhanced interpacket gap detection.
0 = Normal operation.
3
RESERVED
0, RO
RESERVED
2
SCR_DIS
0, RW
Disable Scrambler:
1 = Disable scrambler.
0 = Normal operation.
1
ODD_NIBBLE_DETECT
0, RW
Enable Odd Nibble Detection:
1 = Detect when an odd number of nibbles is received.
0 = Normal operation.
0
FAST_RX_DV
0, RW
Fast RX_DV Enable:
1 = Enable fast RX_DV.
0 = Normal operation.
DP83867CS, DP83867IS, DP83867E
SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025
www.ti.com
78
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Copyright © 2025 Texas Instruments Incorporated
Product Folder Links: DP83867CS DP83867IS DP83867E



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