M41T83RM6F datasheet(17/64 Pages) STMICROELECTRONICS

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M41T82, M41T83

Operation

2.3

Write mode

In this mode the master transmitter transmits to the M41T8x slave receiver. Bus protocol is

shown in Figure 15. Following the START condition and slave address, a logic 0 (R/W = 0)

is placed on the bus and indicates to the addressed device that word address “An” will follow

and is to be written to the on-chip address pointer. The data word to be written to the

memory is strobed in next and the internal address pointer is incremented to the next

address location on the reception of an acknowledge clock. The M41T8x slave receiver will

send an acknowledge clock to the master transmitter after it has received the slave address

(see Figure 12 on page 15) and again after it has received the word address and each data

byte.

Figure 15. Write mode sequence

As in the case of reading, some registers and memory locations are written directly, but the

RTC counters are written via a set of eight buffer/transfer registers at addresses 00h to 07h.

The user will write the date and time information sequentially, and then, at the end of the I2C

write cycle or when the address pointer increments beyond 07h, the buffer/transfer registers

will be copied into the RTC counters. All the time parameters - fractions, seconds, minutes,

hours, day, date, month, year, and century bits - are copied simultaneously.

Whatever value is in the buffer/transfer registers will be copied to the counters, so if the user

only changes one of the eight bytes, the remaining seven bytes will receive the unchanged

contents of the buffer/transfer registers, which will contain whatever was in the counters at

the start of the write access.

For example, if the user starts a write cycle on Monday, November 16, 2009, at 17:52:27.03,

and writes a 22 to the minutes registers, the value Monday, November 16, 2009,

17:52:22.03 will be written back into the counters. At the start of the write cycle, the eight

bytes of counters were copied into the buffer/transfer registers. Then, the seconds register

was overwritten. Finally, the eight bytes were copied back into the counters with the result

that the seconds value was changed.

AI00591

BUS ACTIVITY:

SDA LINE

BUS ACTIVITY:

MASTER

DATA n

DATA n+1

DATA n+X

WORD

ADDRESS (An)

SLAVE

ADDRESS

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