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L99MH98 데이터시트(PDF) 18 Page - STMicroelectronics

부품명 L99MH98
상세설명  Automotive octal half-bridge pre-driver
PDF  147 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L99MH98 데이터시트(HTML) 18 Page - STMicroelectronics

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Symbol
Parameter
Test condition
Min
Typ Max Unit
Vihyst
Input voltage hysteresis
0.1
-
0.5
V
ICSN in
CSN pull-up current input
Probe current on force input pin at
VHL voltage in DC conditions
20
40
60
uA
ISDI in
SCLK, SDI pull down current input
Probe current on force input pin at
VIL voltage in DC conditions
20
40
60
μA
VSDO low SDO output low voltage
ISDO out = 1 mA
-
-
0.4
V
VSDO high SDO output high voltage
ISDO out = 1 mA
3.0 V ≤ VDD ≤ 5.5 V
VDD - 0.4
-
-
V
ISDO leak SDO tristate leakage current
VCSN ≥ 2 V
0 V ≤ VSDO IN ≤ VDD
-10
-
10
μA
AC parameters
fCLK
Clock frequency
CSDO = 50 pF
-
-
6
MHz
tCLK
Clock period
CSDO = 50 pF
166
-
-
ns
t1(1)
Clock high time
75
-
-
ns
t2(1)
Clock low time
75
-
-
ns
t3(1)
CLK low before CSN active
20
-
-
ns
t4(1)
CLK active after CSN active
100
-
-
ns
t5(1)
CLK passive before CSN passive
100
-
-
ns
t6(1)
SDI setup time
30
-
-
ns
t7(1)
SDI hold time
30
-
-
ns
t8(1)
SDO active after CSN active
CSDO = 50 pF
-
-
100
ns
t9(1)
SDO tristate after CSN passive
CSDO = 50 pF
-
-
100
ns
t10(1)
SDO valid time
CSDO = 50 pF
-
-
70
ns
t11(1)
SDO hold time
CSDO = 50 pF
10
-
-
ns
t12(1)
SDO rise time
CSDO = 50 pF
-
-
50
ns
t13(1)
SDO fall time
CSDO = 50 pF
-
-
50
ns
t14(1)
CSN passive time to next frame
600
-
-
ns
t15(1)
CLK passive time to next
100
-
-
ns
t16(1)
SDI data of next frame
20
-
-
ns
tCSN_fail CSN low timeout
Tested by scan
20
35
50
ms
tSTART
Time at the start up before a correct SPI
frame can be received
Tested by scan
-
-
300
μs
1. See the Figure 32.
L99MH98
Electrical specifications
DS14611 - Rev 3
page 18/147



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