L99MH98 datasheet(27/147 Pages) STMICROELECTRONICS

27 / 147 page

The last possible power-on sequence of L99MH98 is shown in the Figure 13. It is possible to raise the VDD and

EN pins of L99MH98 at the same time and with the same slope while keeping the VDH pin low. With the VDD and

VDH pins high it is possible to raise the VDH pin to the battery and then lower it to the ground.

Figure 13. VDD and EN goes high, VDH goes high and low

VDH

VDD

VENH

3.3 V or 5 V

VBAT (13 V typ)

3.3

Thermal warning and thermal shutdown (TW/TSD)

When the device junction temperature rises above the TjTW_ON threshold for a time longer than tfTjTW/TSD, the

temperature warning flag TW is set and no action is taken. The TW flag can be cleared by an SPI “read and clear”

command only if the thermal warning condition is no longer present for a time longer than the corresponding

filtering time tfTjTW/TSD. When the junction temperature rises above the TjSD_ON threshold for a time longer than

tfTjTW/TSD, the thermal shutdown flag TSD is set and the external MOSFETs, together with the charge pump are

switched off to protect the device. The LS gate drivers and the HS gate drivers remain disabled together with the

charge pump until the TSD flag is cleared. The TSD flag can be cleared by an SPI “read and clear” command only

if the thermal shut-down condition is no longer present, namely if Tj < TjSD_OFF for a time longer than the

corresponding filtering time tfTjTW/TSD.

3.4

Charge pump

The dual stage charge pump uses two external flying capacitors, which are switched at the frequency fCP, and

one output capacitor connected between the CPOUT pin and the VDH pin. The output of the charge pump has a

current limitation. After charge pump command enable, and after a filter time tCP_blank, and without any fault, the

charge pump is ready for gate driving functionality.

To enable the charge pump disabled by a thermal shut-down event detection, the TSD flag must be cleared.

After the charge pump start-up, after the initial blanking time, if the charge pump output voltage falls below the

charge pump output voltage low threshold VCP_low for a time longer than tCP, the CPLOW flag is set and the

external MOSFETs are switched off.

If the CP_LOW_CONFIG control bit is set to one, the CPLOW status flag becomes a status bit (set and reset

automatically) and the gate drivers come out of forced disabled mode automatically upon recovery from the

charge pump low voltage condition. In this case the status bit will be automatically cleared as soon as the charge

pump output voltage is no longer below the low voltage threshold for a time longer than tCP. If the

CP_LOW_CONFIG control bit is set to zero, the gate drivers come out of forced disabled mode only once the

charge pump low voltage flag CPLOW is cleared via SPI. The charge pump low voltage flag CPLOW can be

cleared by a SPI “read and cear” command only if the charge pump low voltage condition is no longer present,

namely if VCP > VCP_LOW for a time longer than tCP.

To reduce electromagnetic emissions, the charge pump frequency dithering is enabled by default. However, the

dithering can be disabled through the control bit CPFDD.

L99MH98

Functional description

DS14611 - Rev 3

page 27/147

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