Preliminary Technical Data

ADL5521

Rev. PrC| Page 29 of 45

note - ground is through thermal pad

*Murata-Erie multilayer ceramic cap

1

2

3

4

5

6

7

8

C2 (82pF)

R1 (3.3K

Ω)

VPOS

C5 (1nF)

C3 (1nF)

VBIAS

VDD

Input

RFIN

NC

NC

NC

a

NC

**Coilcraft High Q Surface Mount Inductor

RFOUT

C1*

L1**

L2

Figure 88. LNA Eval Board Schematic.

Table 6. Recommended Components and Positions of Matching Components for Basic Connections, Tuned for Optimal Noise

Frequency

C1

C2

C3

C4

C5

L1

L2

TR1(mm)

TR2(mm)

R1

500MHz

open

10nF

220pF

82pF

open

9nH

12nH

0

0

3.3K

Ω

900 MHz

2.4pF

8.2nH

3.4nH

0

0

1300 MHz

2.7pF

150pf

3.4nH

0

Ω

0

7.5 x 0.5

1950 MHz

1.3pF

1nF

1.1nH

0

Ω

4 x 0.5

3.5 x 0.5

2140 MHz

1.3pf

1.1nH

0

Ω

4.5 x 0.5

3.0 x 0.5

2600 MHz

1.3pf

1.3nH

0

Ω

5 x 0.5

2.5 x 0.5

3500 MHz

0.5pf

1.2nf

2.4pf*

0

Ω

6.5 x 0.5

1x 0.5

*Capacitor, not inductor, used to match at 3500MHz