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2025 Microchip Technology Inc. and its subsidiaries

DS00006232A-page 7

PCI11010C

1.3

Pin Reset States

The pin reset state definitions are detailed in Table 1-3. Refer to Table 3-1 for details on individual pin reset states.

VOD-R_V10

Variable voltage open drain output with programmable output buffer up to 10 mA

(2/4/8/10 mA) in the

VDDRGMII power domain.

VO-R_5

Variable voltage output with 5 mA sink and 5 mA source in the

VDDRGMII power

domain.

VO-R_8

Variable voltage output with 8 mA sink and 8 mA source in the

VDDRGMII power

domain.

VOD-R_8

Variable voltage open drain output with 8 mA sink in the

VDDRGMII power domain.

TABLE 1-3:

PIN RESET STATE LEGEND

Symbol

Description

AI

Analog input

AO

Analog output

IR

RBIAS

P

Power

PD

Hardware enables pull-down

Y

Hardware enables function

Z

Hardware disables output driver (high impedance)

TABLE 1-2:

BUFFER TYPE DESCRIPTIONS (CONTINUED)

Buffer

Description