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ISL6294 데이터시트(PDF) 3 Page - Intersil Corporation

부품명 ISL6294
상세설명  High Input Voltage Charger
PDF  9 Pages
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6294 데이터시트(HTML) 3 Page - Intersil Corporation

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3
FN9174.4
July 9, 2007
Pin Descriptions
VIN - Power input. The absolute maximum input voltage is
28V. A 0.47µF or larger value X5R ceramic capacitor is
recommended to be placed very close to the input pin for
decoupling purpose. Additional capacitance may be required
to provide a stable input voltage.
PPR - Open-drain power presence indication. The open-
drain MOSFET turns on when the input voltage is above the
POR threshold but below the OVP threshold and off
otherwise. This pin is capable to sink 10mA (minimum)
current to drive an LED. The maximum voltage rating for this
pin is 7V. This pin is independent on the EN-pin input.
CHG - Open-drain charge indication pin. This pin outputs a
logic LOW when a charge cycle starts and turns to HIGH
when the end-of-charge (EOC) condition is qualified. This
pin is capable to sink 10mA minimum current to drive an
LED. When the charger is disabled, the CHG outputs high
impedance.
EN - Enable input. This is a logic input pin to disable or
enable the charger. Drive to HIGH to disable the charger.
When this pin is driven to LOW or left floating, the charger is
enabled. This pin has an internal 200k
Ω pull-down resistor.
GND - System ground.
IMIN - End-of-charge (EOC) current program pin. Connect a
resistor between this pin and the GND pin to set the EOC
current. The EOC current IMIN can be programmed by the
Equation 1:
Where RIMIN is in kΩ. The programmable range covers 5%
(or 10mA, whichever is higher) to 50% of IREF. When
programmed to less than 5% or 10mA, the stability is not
guaranteed.
IREF - Charge-current program and monitoring pin. Connect
a resistor between this pin and the GND pin to set the
charge current limit determined by the Equation 2:
Where RIREF is in kΩ. The IREF pin voltage also monitors
the actual charge current during the entire charge cycle,
including the trickle, constant-current, and constant-voltage
phases. When disabled, VIREF = 0V.
BAT - Charger output pin. Connect this pin to the battery. A
1µF or larger X5R ceramic capacitor is recommended for
decoupling and stability purposes. When the EN pin is pulled
to logic HIGH, the BAT output is disabled.
EPAD - Exposed pad. Connect as much as possible copper
to this pad either on the component layer or other layers
through thermal vias to enhance the thermal performance.
INTERNAL TEMPERATURE MONITORING
Charge Current Foldback Threshold
TFOLD
-115
-
°C
LOGIC INPUT AND OUTPUTS
EN Pin Logic Input High
1.3
-
-
V
EN Pin Logic Input Low
--
0.5
V
EN Pin Internal Pull Down Resistance
100
200
400
k
Ω
CHG Sink Current when LOW
Pin Voltage = 1V
10
20
-
mA
CHG Leakage Current When HIGH
VCHG = 6.5V
-
-
1
µA
PPR Sink Current when LOW
Pin Voltage = 1V
10
20
-
mA
PPR Leakage Current When HIGH
VPPR = 6.5V
-
-
1
µA
NOTES:
3. The 4.0V VBAT is selected so that the CHG output can be used as the indication for the offset comparator output indication. If the VBAT is lower
than the POR threshold, no output pin can be used for indication.
4. For junction temperature below +100°C.
5. The charge current can be affected by the thermal foldback function if the IC under the test setup cannot dissipate the heat.
Electrical Specifications
Typical Values Are Tested at VIN = 5V and the Ambient Temperature at +25°C. All Maximum and Minimum
Values Are Guaranteed Under the Recommended Operating Supply Voltage Range and Ambient Temperature
Range, Unless Otherwise Noted. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
MIN
11000
R
IMIN
----------------
mA
()
=
(EQ. 1)
I
REF
12089
R
IREF
-----------------
mA
()
=
(EQ. 2)
ISL6294



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