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MPF0900AMBA2ES 데이터시트(PDF) 202 Page - NXP Semiconductors |
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MPF0900AMBA2ES 데이터시트(HTML) 202 Page - NXP Semiconductors |
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202 / 205 page ![]() NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring Tab. 206. FCCUx debounce time configuration bit ........157 Tab. 207. FCCUx reaction configuration bit .................. 158 Tab. 208. FCCUx internal pull resistor selection bits .....158 Tab. 209. Fault detection in bistable mode ................... 159 Tab. 210. Pull resistor configuration in bistable mode ... 159 Tab. 211. FCCUx fault detection in single-ended mode ..............................................................161 Tab. 212. Pull resistor selection in single-ended level monitoring ......................................................161 Tab. 213. FCCUx error conditions .................................162 Tab. 214. FCCUx internal pull resistor selection in single-ended PWM mode ..............................162 Tab. 215. FCCUx sense bit ...........................................162 Tab. 216. FCCU0 sense bit ...........................................162 Tab. 217. FCCU electrical characteristics ..................... 162 Tab. 218. ABIST flags ................................................... 163 Tab. 219. LBIST status bits ...........................................165 Tab. 220. SHS faults to assert RSTB ............................170 Tab. 221. SHS faults to power cutoff ............................ 170 Tab. 222. BGMON RSTB debounce time to assert RSTB via the DMS ........................................170 Tab. 223. BGMON debounce time to enable the power cutoff via the DMS ..............................171 Tab. 224. VDIG_OV debounce time to assert RSTB via the DMS .................................................. 171 Tab. 225. VDIG_OV debounce time to enable the power cutoff via the DMS ..............................171 Tab. 226. DMS electrical characteristics ....................... 172 Tab. 227. I2C register reset conditions ......................... 173 Tab. 228. I2C bit type definitions ...................................173 Tab. 229. Functional register map .................................173 Tab. 230. Bits reset during soft reset. ........................... 180 Tab. 231. OTP register color code ................................ 182 Tab. 232. OTP Register Map ........................................ 182 Tab. 233. ESD Ratings ..................................................187 Tab. 234. Thermal characteristics ................................. 188 Tab. 235. QFN56 thermal resistance package dissipation ratings ..........................................188 Tab. 236. Operating conditions ..................................... 189 Tab. 237. Revision history .............................................196 PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 202 / 205 |
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