전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

M25P80-VMP6TP 데이터시트(PDF) 8 Page - Numonyx B.V

부품명 M25P80-VMP6TP
상세설명  8 Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface
PDF  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  NUMONYX [Numonyx B.V]
홈페이지  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M25P80-VMP6TP 데이터시트(HTML) 8 Page - Numonyx B.V

Back Button M25P80-VMP6TP Datasheet HTML 4Page - Numonyx B.V M25P80-VMP6TP Datasheet HTML 5Page - Numonyx B.V M25P80-VMP6TP Datasheet HTML 6Page - Numonyx B.V M25P80-VMP6TP Datasheet HTML 7Page - Numonyx B.V M25P80-VMP6TP Datasheet HTML 8Page - Numonyx B.V M25P80-VMP6TP Datasheet HTML 9Page - Numonyx B.V M25P80-VMP6TP Datasheet HTML 10Page - Numonyx B.V M25P80-VMP6TP Datasheet HTML 11Page - Numonyx B.V M25P80-VMP6TP Datasheet HTML 12Page - Numonyx B.V Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 52 page
background image
Signal description
M25P80
8/52
2
Signal description
2.1
Serial Data output (Q)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of Serial Clock (C).
2.2
Serial Data input (D)
This input signal is used to transfer data serially into the device. It receives instructions,
addresses, and the data to be programmed. Values are latched on the rising edge of Serial
Clock (C).
2.3
Serial Clock (C)
This input signal provides the timing of the serial interface. Instructions, addresses, or data
present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on
Serial Data Output (Q) changes after the falling edge of Serial Clock (C).
2.4
Chip Select (S)
When this input signal is High, the device is deselected and Serial Data Output (Q) is at high
impedance. Unless an internal Program, Erase or Write Status Register cycle is in progress,
the device will be in the Standby mode (this is not the Deep Power-down mode). Driving
Chip Select (S) Low enables the device, placing it in the active power mode.
After Power-up, a falling edge on Chip Select (S) is required prior to the start of any
instruction.
2.5
Hold (HOLD)
The Hold (HOLD) signal is used to pause any serial communications with the device without
deselecting the device.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To start the Hold condition, the device must be selected, with Chip Select (S) driven Low.
2.6
Write Protect (W)
The main purpose of this input signal is to freeze the size of the area of memory that is
protected against program or erase instructions (as specified by the values in the BP2, BP1
and BP0 bits of the Status Register).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com