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M25P80-VMP6TP 데이터시트(PDF) 19 Page - Numonyx B.V

부품명 M25P80-VMP6TP
상세설명  8 Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface
PDF  52 Pages
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제조업체  NUMONYX [Numonyx B.V]
홈페이지  http://www.numonyx.com
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M25P80-VMP6TP 데이터시트(HTML) 19 Page - Numonyx B.V

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M25P80
Instructions
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6.1
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 7) sets the Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Table 4.
Instruction set
Instruction
Description
One-byte
instruction code
Address
bytes
Dummy
bytes
Data
bytes
WREN
Write Enable
0000 0110
06h
0
0
0
WRDI
Write Disable
0000 0100
04h
0
0
0
RDID(1)
1.
The RDID instruction is available only for parts made with Technology T9HX (0.11µm), identified with
Process letter '4'. (Details of how to find the Technology Process in the part marking are given in AN1995,
see also Section 12: Part numbering.)
Read Identification
1001 1111
9Fh
0
0
1 to 20
RDSR
Read Status Register
0000 0101
05h
0
0
1 to
∞
WRSR
Write Status Register
0000 0001
01h
0
0
1
READ
Read Data Bytes
0000 0011
03h
3
0
1 to
∞
FAST_READ
Read Data Bytes at Higher
Speed
0000 1011
0Bh
3
1
1 to
∞
PP
Page Program
0000 0010
02h
3
0
1 to 256
SE
Sector Erase
1101 1000
D8h
3
0
0
BE
Bulk Erase
1100 0111
C7h
0
0
0
DP
Deep Power-down
1011 1001
B9h
0
0
0
RES
Release from Deep Power-
down, and Read Electronic
Signature
1010 1011
ABh
0
3
1 to
∞
Release from Deep Power-
down
0
0
0



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