Mne.

Instr.

Cyc.

1st

Cyc.

2nd

Cyc.

3rd

Cyc.

4th

Cyc.

5th

Cyc.

6th

Cyc.

7th

Cyc.

WOTP

(2)

Write OTP

Row

>3

Addr.

Byte

5555h

2AAAh

5555h

Addr 1

Addr 2

Addr 3

Addr 4

Word

5555h

2AAAh

5555h

Data

AAh

55h

B0h

Byte 1

Byte 2

Byte 3

Byte 4

ROTP

(2)

Read OTP

Row

>3

Addr.

Byte

5555h

2AAAh

5555h

Addr 1

Addr 2

Addr 3

Addr 4

Word

5555h

2AAAh

5555h

Data

AAh

55h

90h

Byte 1

Byte 2

Byte 3

Byte 4

RT

Return

from OTP

Read

1

Addr.

X

(1)

Data

F0h

SSDP

(4)

SDP Enable

≥3

Addr.

Byte

5555h

2AAAh

5555h

Word

5555h

2AAAh

5555h

Data

AAh

55h

A0h

SSDP

(5)

SDP

Disable

6

Addr.

Byte

5555h

2AAAh

5555h

5555h

2AAAh

5555h

Word

5555h

2AAAh

5555h

5555h

2AAAh

5555h

Data

AAh

55h

80h

AAh

55h

20h

Notes: 1. X = Don’t Care.

2. Once the WOTP has been initiated (first 3 Cycles), from 1 up to 64 bytes can be written in one single write cycle

(See Write OTP chapter in following pages).

3. Once the ROTP has been initiated (first 3 Cycles), from 1 up to 64 bytes of the OTP can be read (See Read OTP chapter

in following pages). The RT (Return) instruction MUST be sent to the device to exit ROTP mode.

4. Once SDP is set (SSDP instruction sent once), it is necessary to send SSDP prior to any byte or page to be written

in the EEPROM array (See Figure 4 and EEPROM array Software Data Protection chapter in following pages).

5. See Figure 5 and EEPROM array Software Data Protection chapter in following pages.

Table 5B. EEPROM Instructions (EE=0, EF=1)

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