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DIA1412CMP8 데이터시트(PDF) 21 Page - DIOO MICROCIRCUITS CO., LTD |
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DIA1412CMP8 데이터시트(HTML) 21 Page - DIOO MICROCIRCUITS CO., LTD |
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21 / 34 page ![]() DIA1412 Version 1.0, Jul 2024 www.dioo.com © 2024 DIOO MICROCIRCUITS CO., LTD. 17 Addr. R/W Register B7 B6 B5 B4 B3 B2 B1 B0 Default 00h R Internal high byte 128 64 32 16 8 4 2 1 00h 29h R Internal low byte 0.5 0.25 0.125 0.0625 Reserved 00h 01h R External channel high byte 128 64 32 16 8 4 2 1 00h 10h R External channel low byte 0.5 0.25 0.125 0.0625 Reserved 00h Note: R = Read. 12.2. Status register The status register reports the ADC statues and the general error conditions of all channels. Bit 7 (BUSY) indicates that the ADC is currently converting at the time the status register is read. It may be read a “1” or a “0”. To identify specific channels’ error conditions, it is needed to read the external fault register, or High Limit status register, or Low Limit status register, or Therm Limit status register. Once the High Limit, or Low Limit, or Therm Limit register has been read or cleared, all the individual status register bits are cleared and the corresponding status register will be cleared at the same time. Addr. Type Register B7 B6 B5 B4 B3 B2 B1 B0 Default 02h R Status BUSY Reserved HIGH LOW FAULT THERM Reserved 00H (or 80h) Note: R = Read. Bit Name Description 7 BUSY This bit indicates whether the ADC is currently converting or not. “1” represents than ADC is currently converting. 6:5 Reserved Do not use. 4 HIGH This bit will be set if any of the channel’s temperature exceeds its programmed High Limit. The ——— ALERT pin will be asserted once this bit is set. 3 LOW This bit will be set if any of the channel’s temperature drops below its programmed Low Limit. The ——— ALERT pin will be asserted once this bit is set. 2 FAULT This bit will be set if any of the external channel fault is detected. The ——— ALERT pin will be asserted once this bit is set. 1 THERM This bit will be set if any of the channel’s temperature exceeds its programmed Therm Limit. The _____ THERM/ADDR pin will be asserted once this bit is set. 0 Reserved Do not use. |
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