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M58BW016DB 데이터시트(PDF) 33 Page - STMicroelectronics

부품명 M58BW016DB
상세설명  16 Mbit 512Kb x32, Boot Block, Burst 3V Supply Flash Memories
PDF  63 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M58BW016DB 데이터시트(HTML) 33 Page - STMicroelectronics

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M58BW016BT, M58BW016BB, M58BW016DT, M58BW016DB
Figure 9. Asynchronous Bus Read AC Waveforms
Table 16. Asynchronous Bus Read AC Characteristics.
Note: 1. Output Enable G may be delayed up to tELQV - tGLQV after the falling edge of Chip Enable E without increasing tELQV.
Symbol
Parameter
Test Condition
M58BW016
Unit
80
90
100
tAVAV
Address Valid to Address Valid
E = VIL, G = VIL
Min
80
90
100
ns
tAVQV
Address Valid to Output Valid
E = VIL, G = VIL
Max
80
90
100
ns
tAXQX
Address Transition to Output Transition
E = VIL, G = VIL
Min
0
0
0
ns
tEHLX
Chip Enable High to Latch Enable Transition
Min
0
0
0
ns
tEHQX
Chip Enable High to Output Transition
G = VIL
Min
0
0
0
ns
tEHQZ
Chip Enable High to Output Hi-Z
G = VIL
Max
20
20
20
ns
tELQV
(1)
Chip Enable Low to Output Valid
G = VIL
Max
80
90
100
ns
tELQX
Chip Enable Low to Output Transition
G = VIL
Min
0
0
0
ns
tGHQX
Output Enable High to Output Transition
E = VIL
Min
0
0
0
ns
tGHQZ
Output Enable High to Output Hi-Z
E = VIL
Max
15
15
15
ns
tGLQV
Output Enable Low to Output Valid
E = VIL
Max
25
25
25
ns
tGLQX
Output Enable to Output Transition
E = VIL
Min
0
0
0
ns
tLLEL
Latch Enable Low to Chip Enable Low
Min
0
0
0
ns
AI0440 C
E
G
L
A0-A18
DQ0-DQ31
VALID
tLLEL
tAXQX
tELQX
tELQV
tAVQV
tGLQX
tGLQV
tEHQX
tEHQZ
tGHQX
tGHQZ
See also Page Read
OUTPUT
tEHLX
tAVAV
GD
AI04407C
E
G
L
A0-A18
DQ0-DQ31
VALID
tLLEL
tAXQX
tELQX
tELQV
tAVQV
tGLQX
tGLQV
tEHQX
tEHQZ
tGHQX
tGHQZ
See also Page Read
OUTPUT
tEHLX
tAVAV
GD



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