AS7058 datasheet(31/199 Pages) AMSOSRAM

31 / 199 page

AS7058

Functional description

Datasheet • PUBLIC • Document Feedback

DS001077 • v2-00 • 2025-Sep-24

31 / 199

The clock which is used to derive the PPG sample period for the PPG Sequencer is configured

with the 16-bit PPG clock divider registers PPG_FREQH and PPG_FREQL. The clocks and its

related sample periods for the ECG/BioZ Sequencer are configured with three additional clock

dividers. There is an ECG base divider which is configured with ECG_FREQH and

ECG_FREQL register. The output of the ECG Base Divider is fed into the ECG1 Clock Divider

and ECG2 Clock Divider, which define the sampling period for ECG/BioZ Sequencer 1 and

Sequencer 2. ECG1 Clock Divider is controlled via register ECG1_FREQDIVH and

ECG1_FREQDIVL. ECG2 Clock Divider is controlled via register ECG2_FREQDIVH and

ECG2_FREQDIVL. An overview of the sequencer clock generation unit is shown in Figure 28.

7.5

PPG sample structure

The AS7058 offers high flexibility in programming all the different combinations of the

photodiode and LED pins. The PPG sequencer divides a PPG measurement into PPG

samples according to the programmed PPG Sample Period time like it is shown in Figure 27.

Each PPG Sample can be divided into a maximum of eight subsamples, which allow for

individual configuration. An overview of the configuration options for a PPG Sample is shown

in Figure 29. There are general settings and like which LED is assigned to which LED input

channel which are the same for each subsample. The LED input channel current settings can

be configured with LEDx_ICTRL along with the LED current range LEDx_IRNG for each LED.

AS7058 데이터시트(PDF) 31 Page - ams-OSRAM AG