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db09284e_V3.01_preliminary_2017-07-06

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AS89020

V3.01

OPERATIONAL

STATE

REGISTER OSR

NAME

VALUE [B]

AFFECTED OPERATIONAL STATE

bit 2 to 0

DOS

(Device

Operational

State)

000

NOP (no operation)

001

reserved

0108

operational state: configuration

011

operational state: measurement

1XX

reserved

The bits OSR:DOS switch the operational state of the device between configuration and measurement. The

configuration state enables the access to the control register bank (Table 7). In this state no measurement

can be performed. The measurements can only be performed in the measurement state. In this state any

access to the control register bank (except OSR) is not possible. The control registers will be reset to their

default values when the operational state is switched back to the configuration state.

The start of the measurement is controlled by the setting of the bit OSR:TRACK, which is only evaluated in

the measurement state.

The Power Down mode is controlled by the setting of the OSR:PD. The Power Down mode takes effect in

both operational states. The active Power Down state in measurement state can be used between two

consecutive measurements. The start-up time tSUPDOFF is to be considered before the new conversion can

be started.

6.3 API Generation Register – AGEN

The value of this read-only register indicates the generation of the control register bank. The register’s

value changes whenever any formal modification is introduced to the control register bank. This case

indicates that the Application Programming Interface (API) has been changed.

Table 9: Register AGEN – Address 02h

AGEN

Name

Value [b]

Description

bit 7 to 4

DEVID

0100

device ID number; the value ,0100b’ is reserved for

AS89020 devices

Bit 3 to 0

MUT

0000

version number of control register bank

6.4 Configuration Register – CREG

The register CREG configured the main characteristics of AS89020.

Table 10: Register CREG - Address 06h

CREG

NAME

VALUE [B]

DESCRIPTION

0

disable the temperature compensation

19

enable the temperature compensation

09

no offset signal will be generated at all inputs INX

1

generates offset signal of ,63dec’ for all inputs INX

0

input current direction is out of the inputs INX –

common anode photodiodes (see Figure 15 (b))

9 Default after power-on-reset