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PSD835G2-90UI 데이터시트(PDF) 44 Page - STMicroelectronics

부품명 PSD835G2-90UI
상세설명  Configurable Memory System on a Chip for 8-Bit Microcontrollers
PDF  110 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD835G2-90UI 데이터시트(HTML) 44 Page - STMicroelectronics

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PSD835G2
PSD8XX Family
43
The
PSD835G2
Functional
Blocks
(cont.)
9.3 Microcontroller Bus Interface
The “no-glue logic” PSD835G2 Microcontroller Bus Interface can be directly connected to
most popular microcontrollers and their control signals. Key 8-bit microcontrollers with their
bus types and control signals are shown in Table 14. The MCU interface type is
specified using the PSDsoft.
9.3.1. PSD835G2 Interface to a Multiplexed Bus
Figure 17 shows an example of a system using a microcontroller with a 8-bit multiplexed
bus and a PSD835G2. The ADIO port on the PSD835G2 is connected directly to the
microcontroller address/data bus. ALE latches the address lines internally. Latched
addresses can be brought out to Port E, F or G. The PSD835G2 drives the ADIO data bus
only when one of its internal resources is accessed and the RD input is active. Should the
system address bus exceed sixteen bits, Ports A, B, C, or F may be used as additional
address inputs.
9.3.2. PSD835G2 Interface to a Non-Multiplexed Bus
Figure 18 shows an example of a system using a microcontroller with a 8-bit
non-multiplexed bus and a PSD835G2. The address bus is connected to the ADIO Port,
and the data bus is connected to Port F. Port F is in tri-state mode when the PSD835G2
is not accessed by the microcontroller. Should the system address bus exceed sixteen
bits, Ports A, B or C may be used for additional address inputs.
Data
Bus
MCU
Width
CNTL0
CNTL1
CNTL2
PC7
PD0**
ADIO0
PF3-PF0 PF7-PF4
8031/8051
8
WR
RD
PSEN
*
ALE
A0
**
80C51XA
8
WR
RD
PSEN
*
ALE
A4
A3-A0
*
80C251
8
WR
PSEN
**
ALE
A0
**
80C251
8
WR
RD
PSEN
*
ALE
A0
**
80198
8
WR
RD
**
ALE
A0
**
68HC11
8
R/W
E
**
AS
A0
**
68HC05C0
8
WR
RD
**
AS
A0
**
68HC912
8
R/W
E
*
DBE
AS
A0
**
Z80
8
WR
RD
**
*
A0
D3-D0
D7-D4
Z8
8
R/W
DS
**
AS
A0
**
68330
8
R/W
DS
**
AS
A0
**
M37702M2
8
R/W
E
**
ALE
A0
D3-D0
D7-D4
Table 14. Microcontrollers and their Control Signals
**Unused CNTL2 pin can be configured as PLD input. Other unused pins (PD3-0, PA3-0) can be
**configured for other I/O functions.
**ALE/AS input is optional for microcontrollers with a non-multiplexed bus



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