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XM33C321ASPZR 데이터시트(PDF) 59 Page - Texas Instruments

부품명 XM33C321ASPZR
상세설명  MSPM33C321x Mixed-Signal Microcontrollers
PDF  122 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

XM33C321ASPZR 데이터시트(HTML) 59 Page - Texas Instruments

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over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tHDO:QSPI_I
Ox
QSPI_IOx output hold time
3
ns
7.10.5.2 QSPI Timing Diagram
tCS:LEAD
QSPI_SCLK
(SPO = 0)
QSPI_SCLK
(SPO = 1)
tCS:LAG
tHDO:QSPI_IOx
tVALID:QSPI_IOx
tSU:QSPI_IOx
tHDI:QSPI_IOx
1/fQSPI_CLK
tQSPI_CLKH
tQSPI_CLKL
tCS:ACC
QSPI_CSx
QSPI_IOx
QSPI WRITE
QSPI READ
Figure 7-6. QSPI Timing Diagram - Controller Mode
7.10.6 I2S/TDM
7.10.6.1 Serial Audio
over operating free-air temperature range (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Controller Mode
fBCLK
Serial Audio bit clock frequency
Transmitter mode
12.5
MHz
Receiver mode
12.5
MHz
tVALID.WCLK
Word Clock output valid time
VDD ≥ 2.7V
18
ns
VDD ≥ 1.71V
21
ns
tHOLD:WCLK
Word Clock output hold time
1
ns
tVALID:ADx
Data output valid time
VDD ≥ 2.7V, Transmitter mode
20.5
ns
VDD ≥ 1.71V, Transmitter mode
28.5
ns
tHOLD:ADx
Data output hold time
Transmitter mode
3
ns
tSU.ADx
Data input setup time
VDD ≥ 2.7V, Receiver mode
8.5
ns
VDD ≥ 1.71V, Receiver mode
10
ns
tHOLD.ADx
Data input hold time
VDD ≥ 2.7V, Receiver mode
2
ns
VDD ≥ 1.71V, Receiver mode
3.1
ns
Target Mode
fBCLK
Serial Audio bit clock frequency
Transmitter mode
25
MHz
Receiver mode
25
MHz
www.ti.com
MSPM33C321A, MSPM33C3219
SLASFB6A – DECEMBER 2025 – REVISED SEPTEMBER 2026
Copyright © 2026 Texas Instruments Incorporated
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Product Folder Links: MSPM33C321A MSPM33C3219



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