| 전자부품 데이터시트 검색엔진 |
|
ST10F280 데이터시트(PDF) 83 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST10F280 데이터시트(HTML) 83 Page - STMicroelectronics |
|
83 / 186 page ![]() ST10F280 83/186 The pins of Port 2 combine internal bus data with alternate data output before the port latch input. Figure 34 : Block Diagram of a Port 2 Pin Open Drain Latch Write ODP2.y Read ODP2.y Direction Latch Write DP2.y Read DP2.y MUX 0 1 Alternate Data Input Input Latch P2.y CCyIO Output Buffer x = 7...0 Alternate Data Output MUX 0 1 Output Latch ≥ 1 Write Port P2.y Compare Trigger Read P2.y Fast External Interrupt Input CPU Clock EXxIN y = 15...0 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |