ST18952 datasheet(15/67 Pages) STMICROELECTRONICS

15 / 67 page

15/66

ST18952

Memory

5.1

Internal memory resource

One 32 Kword and two 8 Kword single port memories are included on-chip:

• Instruction memory on I space from address 0 to 32767 (32 K)

• X-Data memory on X space from address 0 to 8191 (8 K)

• Y-Data memory on Y space from address 0 to 8191 (8 K)

One 512 word dual port memory is shared on X and Y spaces, from addresses 8192 (8 K) to

8703 (8.5K). This is represented graphically below.

Note: the first 256 addresses of the Y space are reserved for the D950 memory-mapped

registers and for on-chip memory mapped peripherals.

Memory can be extended off-chip for all three spaces in two ways:

1: Directly - Accesses to program and data memories can be performed simulta-

neously. Insertion of wait-states is necessary in case of nominal frequency

work.

2: Through the bus switch unit - Accesses to the different external spaces are mul-

tiplexed and wait-states are added.

The specific details on the operation of the BSU are described separately in ”Bus Switch Unit”

on page 18.

Figure 5.1

Memory mapping

0000

1FFF

32k

FFFF

64k

Internal SPRAM

Registers

External

Internal SPRAM

External

All addresses are hexadecimal

Internal DPRAM

21FF

8.5k

0100

64k

8.5k

FFFF

8000

1FFF

FFFF

21FF

External memory is accessed directly or through the bus switch

X-memory

I-memory

Y-memory

ST18952 데이터시트(PDF) 15 Page - STMicroelectronics

ST18952 데이터시트(HTML) 15 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67

데이터시트 다운로드

링크 URL