전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

DSP56F826 데이터시트(PDF) 26 Page - Freescale Semiconductor, Inc

부품명 DSP56F826
상세설명  16-bit Digital Signal Controllers
PDF  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  FREESCALE [Freescale Semiconductor, Inc]
홈페이지  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56F826 데이터시트(HTML) 26 Page - Freescale Semiconductor, Inc

Back Button DSP56F826 Datasheet HTML 22Page - Freescale Semiconductor, Inc DSP56F826 Datasheet HTML 23Page - Freescale Semiconductor, Inc DSP56F826 Datasheet HTML 24Page - Freescale Semiconductor, Inc DSP56F826 Datasheet HTML 25Page - Freescale Semiconductor, Inc DSP56F826 Datasheet HTML 26Page - Freescale Semiconductor, Inc DSP56F826 Datasheet HTML 27Page - Freescale Semiconductor, Inc DSP56F826 Datasheet HTML 28Page - Freescale Semiconductor, Inc DSP56F826 Datasheet HTML 29Page - Freescale Semiconductor, Inc DSP56F826 Datasheet HTML 30Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 26 / 60 page
background image
56F827 Technical Data, Rev. 12
26
Freescale Semiconductor
VDD should not be allowed to rise early (1). This is usually avoided by running the regulator for the VDD
supply (2.5V) from the voltage generated by the 3.3V VDDIO supply, see Figure 3-3. This keeps VDD from
rising faster than VDDIO.
VDD should not rise so late that a large voltage difference is allowed between the two supplies (2).
Typically, this situation is avoided by using external discrete diodes in series between supplies, as shown
in Figure 3-3. The series diodes forward bias when the difference between VDDIO and VDD reaches
approximately 1.4, causing VDD to rise as VDDIO ramps up. When the VDD regulator begins proper
operation, the difference between supplies will typically be 0.8V and conduction through the diode chain
reduces to essentially leakage current. During supply sequencing, the following general relationship
should be adhered to:
VDDIO > VDD > (VDDIO - 1.4V)
In practice, VDDA is typically connected directly to VDDIO with some filtering.
Figure 3-3 Example Circuit to Control Supply Sequencing
3.4 AC Electrical Characteristics
Timing waveforms in Section 3.4 are tested using the VIL and VIHlevels specified in the DC Characteristics
table. In Figure 3-4 the levels of VIH and VIL for an input signal are shown.
Figure 3-4 Input Signal Measurement References
Figure 3-5 shows the definitions of the following signal states:
•
Active state, when a bus or signal is driven, and enters a low impedance state
•
Tri-stated, when a bus or signal is placed in a high impedance state
•
Data Valid state, when a signal level has reached VOL or VOH
•
Data Invalid state, when a signal level is in transition between VOL and VOH
3.3V
Regulator
2.5V
Regulator
Supply
VDD
VDDIO, VDDA
VIH
VIL
Fall Time
Input Signal
Note: The midpoint is VIL + (VIH – VIL)/2.
Midpoint1
Low
High
Pulse Width
90%
50%
10%
Rise Time



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com