 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AT89C51ID2-RDTIM 데이터시트(PDF) 112 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT89C51ID2-RDTIM 데이터시트(HTML) 112 Page - ATMEL Corporation |
|
|
112 / 159 page  112 AT89C51ID2 4289A–8051–09/03 EEPROM Data Memory The 2K bytes on-chip EEPROM memory block is located at addresses 0000h to 07FFh of the XRAM/ERAM memory space and is selected by setting control bits in the EECON register. A read or write access to the EEPROM memory is done with a MOVX instruction. Write Data Data is written by byte to the EEPROM memory block as for an external RAM memory. The following procedure is used to write to the EEPROM memory: • Check EEBUSY flag • If the user application interrupts routines use XRAM memory space: Save and disable interrupts. • Load DPTR with the address to write • Store A register with the data to be written • Set bit EEE of EECON register • Execute a MOVX @DPTR, A • Clear bit EEE of EECON register • Restore interrupts. • EEBUSY flag in EECON is then set by hardware to indicate that programming is in progress and that the EEPROM segment is not available for reading or writing. • The end of programming is indicated by a hardware clear of the EEBUSY flag. Figure 44 represents the optimal write sequence to the on-chip EEPROM data memory. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
