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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ADE7166ASTZF8 데이터시트(PDF) 67 Page - Analog Devices |
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ADE7166ASTZF8 데이터시트(HTML) 67 Page - Analog Devices |
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67 / 148 page  Preliminary Technical Data ADE75xx/ADE71xx Rev. PrE | Page 67 of 148 WGAIN/0.9997 WGAIN/0.9999 VAGAIN = 9.44 + WGAIN/0.9977 VAGAIN = -60.53 + WGAIN/1.0015 ENERGY MEASUREMENT INTERRUPTS The Energy Measurement part of the ADE75XX/ADE71XX has its own interrupt vector for the 8052 core – Vector address 0x004B – see Interrupt Vectors section. The bits set in the Interrupt Enable Register 1 SFR (MIRQENL, 0xD9), Interrupt Enable Register 2 SFR (MIRQENM, 0xDA), and Interrupt Enable Register 3 SFR (MIRQENH, 0xDB) enables the energy measurement interrupts that are allowed to interrupt the 8052 core. If an event is not enabled, it cannot create a system interrupt. The ADE interrupt stays active until the status bit that has created the interrupt is cleared. A status bit of the ADE irq status register (1, 2 or 3) is cleared when a zero is written the bit to clear and acknowledge the event. |
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