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DP80390 데이터시트(PDF) 23 Page - Digital Core Design |
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DP80390 데이터시트(HTML) 23 Page - Digital Core Design |
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23 / 84 page ![]() DP80390 Instructions set details - 23 - All trademarks mentioned in this document http://www.DigitalCoreDesign.com are trademarks of their respective owners. http://www.dcd.pl Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved. 3.5. ANL Instruction: ANL <dest-byte>, <src-byte> Function: Logical AND for byte operands Description: ANL performs the bit wise logical AND operation between the variables indicated and stores the results in the destination variable. No flags are affected (except P, if <dest-byte> = A). The two operands allow six addressing mode combinations. When the destination is a accumulator, the source can use register, direct, register-indirect, or immediate addressing; when the destination is a direct address, the source can be the accumulator or immediate data. Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins. 3.5.1. ANL A, RN Operation: (PC) ← (PC) + 1 (A) ← (A) and (Rn) Bytes: 1 Cycles: 1 Encoding: 0 1 0 1 1 r r r 3.5.2. ANL A, DIRECT Operation: (PC) ← (PC) + 2 (A) ← (A) and (direct) Bytes: 2 Cycles: 2 Encoding: 0 1 0 1 0 1 0 1 direct address |
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