C511 datasheet(36/128 Pages) SIEMENS

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On-Chip Peripheral Units

Semiconductor Group

6-3

In fact, the pullups mentioned before and included in figure 6-2 are pullup arrangements shown in

figure 6-6-15a. One n-channel pulldown FET and three pullup FETs are used:

Figure 6-15a

Output Driver Circuit of Ports 1, 2 and 3 (except P1.2, P1.3, P1.4 and P1.5)

–The pulldown FET n1 is of n-channel type. It is a very strong driver transistor which is capable

of sinking high currents (

OL); it is only activated if a "0" is programmed to the port pin. A short

circuit to

CC must be avoided if the transistor is turned on, since the high current might destroy

the FET. This also means that no ”0“ must be programmed into the latch of a pin that is used

as input.

–The pullup FET p1 is of p-channel type. It is activated for two oscillator periods (S1P1 and

S1P2) if a 0-to-1 transition is programmed to the port pin, i.e. a "1" is programmed to the port

latch which contained a "0". The extra pullup can drive a similar current as the pulldown FET

n1. This provides a fast transition of the logic levels at the pin.

–The pullup FET p2 is of p-channel type. It is always activated when a "1" is in the port latch,

thus providing the logic high output level. This pullup FET sources a much lower current than

p1; therefore the pin may also be tied to ground, e.g. when used as input with logic low input

level.

– The pullup FET p3 is of p-channel type. It is only activated if the voltage at the port pin is

higher than approximately 1.0 to 1.5 V. This provides an additional pullup current if a logic

high level shall be output at the pin (and the voltage is not forced lower than approximately

1.0 to 1.5 V). However, this transistor is turned off if the pin is driven to a logic low level, e.g

when used as input. In this configuration only the weak pullup FET p2 is active, which sources

the current

IL . If, in addition, the pullup FET p3 is activated, a higher current can be sourced

(

TL). Thus, an additional power consumption can be avoided if port pins are used as inputs

with a low level applied. However, the driving capability is stronger if a logic high level is

output.

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