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STE2002DIE1 데이터시트(PDF) 19 Page - STMicroelectronics

부품명 STE2002DIE1
상세설명  81 X 128 SINGLE CHIP LCD CONTROLLER / DRIVER
PDF  51 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STE2002DIE1 데이터시트(HTML) 19 Page - STMicroelectronics

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STE2002
Dual Partial Display
If the PE Bit is set to a logic one the dual partial display mode is enabled.
Eight partial display modes are available. The offset of the two partial display zones is row by row programma-
ble. The Icon row is accessed last in each partial display frame.
Two sets of register for the HV-generator parameters are provided (PRS[1:0], Vop[6:0], BS[2:0], CP[2:0].).
This allows switching from normal mode to partial display mode applying one instruction. The HV generator is
automatically re configured using the parameters related to the enabled mode. The parameters of the two sets
of registers with the same function are located in the same position of the instruction set. The registers related
to the normal mode are accessible when normal mode (PE=0) is selected, the others are accessible when the
partial display mode is enabled (PE=1). To Setup PRS[1:0], Vop[6:0], BS[2:0], CP[2:0] values the instruction
flow proposed in Fig.46 must be followed. To setup Partial Display Sectors Start Address and Partial Dis-
play Mode no particular instruction flow has to be followed.
.
MUX RATE
ICON MODE
OFFSET
RANGE
DESCRIPTION
ICON Row Driver with
MY=0
MUX 33
1
0-31
ICON ROW NOT SCROOLED
R56
MUX 33
0
0-32
33 LINE GRAPHIC MATRIX
R56
MUX 49
1
0-47
ICON ROW NOT SCROOLED
R64
MUX 49
0
0-48
49 LINE GRAPHIC MATRIX
R64
MUX 65
1
0-63
ICON ROW NOT SCROOLED
R72
MUX 65
0
0-64
65 LINE GRAPHIC MATRIX
R72
MUX 81
1
0-79
ICON ROW NOT SCROOLED
R80
MUX 81
0
0-80
81 LINE GRAPHIC MATRIX
R80
PD2
PD1
PD0
SECTION 1
SECTION2
RESET STATE
0
0
0
0
8 + Icon Row
0
0
1
8
0 + Icon Row
0
1
0
8
8 + Icon Row
0
1
1
0
16 + Icon Row
000
1
0
0
16
0 + Icon Row
1
0
1
8
16 + Icon Row
1
1
0
16
8 + Icon Row
1
1
1
16
16 + Icon Row



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