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OR4 데이터시트(PDF) 81 Page - Lattice Semiconductor

부품명 OR4
상세설명  ORCASeries 4 FPGAs
PDF  152 Pages
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OR4 데이터시트(HTML) 81 Page - Lattice Semiconductor

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Lattice Semiconductor
81
Data Sheet
May, 2006
ORCA Series 4 FPGAs
Timing Characteristics (continued)
Table 40. PFU used as Dual-Port RAM: Sync. Write and Sync. or Async. Read Timing Characteristics
OR4Exx commercial: VDD15 = 1.425 V, VDD33 = 3.0 V, TJ = +85 ˚C
OR4Exx industrial: VDD15 = 1.425 V, VDD33 = 3.0 V, TJ = +100 ˚C
Note: A complete listing of PFU timing parameters can be displayed in ispLEVER. This is a sampling of the key timing parameters. 
Parameter
Symbol
Speed
Unit
-1
-2
-3
Min
Max
Min
Max
Min
Max
Write Operation for RAM Mode:
Maximum Write Clock Frequency
Write Data to CLK Setup Time
Write CLK to Data Out
SMWCLK_FRQ
WD_SET
MEM_DEL
—
0.00
—
300.00
—
2.21
—
0.00
—
382.00
—
1.89
—
0.00
—
422.00
—
1.71
MHz
ns
ns
Async Read Operation for RAM Mode:
Data Out Valid After Address
RA_DEL
—
0.66
—
0.55
—
0.50
ns
Sync Read Operation for RAM Mode:
Maximum Read Clock Frequency
Read CLK to Data Out
SMRCLK_FRQ
REG_DEL
—
—
300.00
1.03
—
—
382.00
0.92
—
—
422.00
0.84
MHz
ns



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