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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SABRE-LL-I 데이터시트(PDF) 68 Page - STMicroelectronics |
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SABRE-LL-I 데이터시트(HTML) 68 Page - STMicroelectronics |
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68 / 141 page  Power bridges SABRE-LL-I 68/141 Figure 18. Internal comparator functional block diagram The functionality of this circuit is obtained by using the bridge 4 output stage. This circuit is powered directly from VSupply and it is intended to be used as a battery charger or a switching regulator. The control loop block diagram is shown in the following figure: Figure 19. Battery charger control loop block diagram The battery charger control loop implements an asynchronous switching regulator intended to be used as a constant voltage/constant current programmable source. GPIOz GPIOx GPIOx DECODE LOGIC GPIOy GPIOy DECODE LOGIC GPIOz Logic Driver + V3v3 GPIOz DECODE LOGIC GPIOz Value From SP GPIOzMod e GPIOyMode IREF_FB VREF_FB SABRE COMP_I COMP_V PULSE SKIPPING BURST CONTROL LOGIC PEAK CURRENT MODE CONTROL LOGIC BRIDGE 4 PARALLELED POWER STAGE SelFBRef<1:0> DC4_plus DC4_minus SelCurrRef<1:0> DIFF AMPLI TO LOAD FBRef CurrRef Ilimit PWM |
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