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SABRE-LL-I 데이터시트(PDF) 43 Page - STMicroelectronics |
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SABRE-LL-I 데이터시트(HTML) 43 Page - STMicroelectronics |
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43 / 141 page ![]() SABRE-LL-I Switching regulator controller 43/141 Figure 10. Switching regulator controller functional blocks 13.2 Pulse skipping operation Pulse skipping strategy has already been explained on main switching regulator section. This regulator has 4 possible PWM duty cycles that can be changed writing in the SelSwCtrPWM bits in the SwCtrCfg register using SPI. Adjustable duty cycles can be changed using a metal layer change in order to adapt it to customer system. The only limitation is that all regulators share the same duty cycle bus, so any modification must consider all regulators needed duty cycles. Vout La Vsupply C Driver Control Logic CurrentSense Charge pump Voltage Voltage Loop Control VFBRef - + Under voltage Threshold Filter Ra Rb From Central Logic Regulator Freq - + To Central Logic undervoltage flag Rsense VSWDRV_gate N-CH Fet Vref = 3 V Vref=0.8V SelFBRef[1:0] Uv Threshold 1 SelFBRef Uv Threshold 2 Vref = 3V Vref=0.8V VSWDRV FB VSWDRV SW VSWDRW_sns Table 23. Switching regulator controller PWM specification SwCtrCfg register Duty cycle value Comments SelSwCtrPWM[1:0] Typical 00 9% 01 12% 10 22.5% Default state 11 58% |
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