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SABRE-LL-I 데이터시트(PDF) 81 Page - STMicroelectronics |
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SABRE-LL-I 데이터시트(HTML) 81 Page - STMicroelectronics |
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81 / 141 page ![]() SABRE-LL-I Current DAC circuit 81/141 same register being DacValue[0] the least significant bit and DacValue[5] the most significant bit. The current DAC has three possible current ranges that can be selected using the DacRange[1:0] bits in the CurrDacCtrl register . The DAC range selection table is shown here below: By changing LSB current value, all steps will change following this relation: Istep(N) = N * ILSB where N is the value of DacValue[5:0] bits. Table 58. Current DAC truth DacRange[1] DacRange[0] LSB typical current ILSB typ Full scale typical current IFULL typ 0 0 Disabled Disabled 0 1 10 µA 0.63 mA 1 0 100 µA 6.3 mA 11 1 mA 63 mA Table 59. Current DAC specification Parameter Description Test condition Min Typ Max Unit VR Pin voltage operative range (1) 1. All parameters are guaranteed in the range between VOL and VR Max. 0.7 5.5 V IOUT_OFF Output off leakage current DacValue[5:0] = 000000 -1 +1 µA IFULL_ERR_01 Full scale current error DacRange[1:0] =01 DacValue[5:0] = 111111 -10 10 % of IFULL typ IFULL_ERR_10 Full scale current error DacRange[1:0] =10 DacValue[5:0] = 111111 -13 13 % of IFULL typ IFULL_ERR_11 Full scale current error DacRange[1:0] =11 DacValue[5:0] = 111111 -12 12 % of IFULL typ INL10_11 Integral non-linearity for 10 and 11 ranges ±2 LSB DNL10_11 Differential non-linearity for 10 and 11 ranges ±2 LSB INL01 Integral non-linearity for 01 range ±1 LSB DNL01 Differential non-linearity for 01 range ±1 LSB RCurrDac_res Gpio[8] divider total resistance -25% 45 +25% k Ω RCurrDac_ratio Gpio[8] divider ratio -2.5% 3/5 +2.5% tset Settling time (2) 2. Measured from DacValue[5:0] change in SPI interface. 5µs |
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