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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STV2310 데이터시트(PDF) 13 Page - STMicroelectronics |
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STV2310 데이터시트(HTML) 13 Page - STMicroelectronics |
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13 / 112 page  13/112 STV2310 Default Setup At Reset 3 Default Setup At Reset The default configuration at reset is: ● CVBS1_ input active ● Fast Blanking input for RGB insertion enable ● Automatic Standard Recognition of NTSC/PAL/SECAM ● Comb filter enable ● Data slicer enable ● Output ITU_R BT. 656/601 ● Output clock CLK_DATA rising edge active ● PLL lock, HSYNC, VSYNC, FIELD primary functions enable ● Output pads active when Pin 16 connected to ground ● Output pads high impedance state when pin 16 connected to 3.3V ● Automatic HPLL time constant selection For more detailed reset configuration descriptions, refer to Chapter 5: Register List. 3.1 System Clock Generation The STV2310 clock is either provided by an internal 27-MHz crystal oscillator connected to pins XTALIN_CLKXTP and XTALOUT, or imported in Differential mode from an external device such as the STV3500 and connected to the XTALIN_CLKXTP and CLKXTM pins. |
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