STW8009 datasheet(32/66 Pages) STMICROELECTRONICS

32 / 66 page

STw8009/STw8019

Control registers

31/65

Note:

bit “jump” is automatically reset after use.

maxdyn: max dynamic magnitude allowed on YCrCb inputs for encoding.

(*) 0 = 10hex to EBhex for Y, 10hex to F0hex for chrominance (Cr,Cb)

1= 01hex to FEhex for Y, Cr and Cb

Note:

In any case, EAV and SAV words are replaced by blanking values before being fed to the

luminance and Chrominance processing.

bypass_sync_corr: tst_dac bypass mode with sync correction. This is a test mode in which

data coming from port tst_dac can be output with or without sync correction and given to the

dacs.

(*) 0 = There is no sync correction applicable to the data coming from tst_dac.

1 = Sync correction takes place before setting the dacs provided tst_ana(0) is set to ‘1’.

Please note that in this case only 8 MSBs are used to generate a 10-bit sync corrected

output from the filter.

Automatic line insert mode.

The 2nd field of the frame following the writing of this value is

increased. Line insertion is done after line 245 in 525/60 and

after line 290 in 625/50.

“lref” and “ltar” are ignored.(1)

Automatic line skip mode.

The 2nd field of the frame following the writing of this value is

decreased. Line suppression is done after line 245 in 525/60

and after line 290 in 625/50.

“lref” and “ltar” are ignored.(1)

Not to be used.

Two lines are skipped (inserted) in 525/60 and four lines in 625/50 standards

Table 10.

jump, dec_ninc, free_jump

jump

dec_

ninc

free_

jump

update mode

Table 11.

cfc[1:0]: color frequency control via CFC line

cfc1

cfc0

update mode

(*)

disabled (update is done by loading of registers 10,11 and12)

update of increment for DDFS just after serial loading via CFC

update of increment for DDFS on next active edge of HSYNC

update of increment for DDFS just before next color burst

configuration7

Address: 0x0007

Type: R/W

content

xxx

bypass_

sync_

corr

default

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