R8C2K datasheet(336/471 Pages) RENESAS

336 / 471 page

R8C/2K Group, R8C/2L Group

17. Serial Interface

Rev.1.10

Dec 21, 2007

Page 319 of 450

REJ09B0406-0110

Figure 17.4

Registers U0TB, U2TB and U0C0, U2C0

UARTi Transmit/Receive Control Register 0 (i = 0 or 2)

Symbol

Address

After Reset

U0C0

00A4h

00001000b

U2C0

0164h

00001000b

Bit Symbol

Bit Name

Function

NOTE:

b3 b2

TXEPT

b1 b0

CLK0

—

Reserved bit

b7 b6 b5 b4

—

(b2)

CKPOL

CLK1

BRG count source select

bits(1)

b1 b0

0 0 : Selects f1

0 1 : Selects f8

1 0 : Selects f32

1 1 : Do not set.

—

(b4)

CLK polarity select bit

0 : Transmit data is output at falling edge of transfer

clock and receive data is input at rising edge

1 : Transmit data is output at rising edge of transfer

clock and receive data is input at falling edge

Set to 0.

Transmit register empty

flag

0 : Data in transmit register (during transmit)

1 : No data in transmit register (transmit completed)

Nothing is assigned. If necessary, set to 0.

When read, the content is 0.

If the BRG count source is sw itched, set the UiBRG register again.

Data output select bit

0 : TXDi pin is for CMOS output

1 : TXDi pin is for N-channel open-drain output

UFORM

Transfer format select bit 0 : LSB first

1 : MSB first

NCH

UARTi Transmit Buffer Register (i = 0 or 2)

(1, 2)

Symbol

Address

After Reset

U0TB

00A3h-00A2h

Undefined

U2TB

0163h-0162h

Undefined

NOTES:

(b15)

(b8)

When the transfer data length is 9 bits, w rite data to high byte first, then low byte.

Use the MOV instruction to w rite to this register.

Function

—

Transmit data

Nothing is assigned. If necessary, set to 0.

When read, the content is undefined.

—

(b8-b0)

—

(b15-b9)

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