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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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R8C2K 데이터시트(PDF) 360 Page - Renesas Technology Corp |
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R8C2K 데이터시트(HTML) 360 Page - Renesas Technology Corp |
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360 / 471 page  R8C/2K Group, R8C/2L Group 18. Hardware LIN Rev.1.10 Dec 21, 2007 Page 343 of 450 REJ09B0406-0110 Figure 18.10 Example of Header Field Reception Flowchart (3) Hardware LIN Read the Synch Field measurement- completed flag SFDCT flag in the LINST register UART0 Set the UART0 communication rate U0BRG register Communication via UART0 (The SBDCT flag is set when the timer RA counter underflows upon reaching the terminal count.) B SFDCT = 1 ? YES UART0 Communication via UART0 Clock asynchronous serial interface (UART) mode Transmit ID field NO Hardware LIN measures the Synch Field. The interrupt of timer RA may be used (the SBDCT flag is set when the timer RA counter underflows upon reaching the terminal count). When the SBE bit in the LINCR register is set to 1 (unmasked after Synch Field measurement is completed), timer RA may be used in timer mode after the SFDCT bit in the LINST register is set to 1. Set a communication rate based on the Synch Field measurement result. YES Timer RA Set the Synch Break width again TRAPRE register TRA register |
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