R8C2K datasheet(297/471 Pages) RENESAS

297 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 280 of 450

REJ09B0406-0110

Figure 16.121 Operating Example of Reset Synchronous PWM Mode

Initial output “H”

Active level “L”

Value in TRD0 register

Count source

m+1

TRDIOD0 output

m-n

TRDIOD1 output

m: Value set in TRDGRA0 register

n: Value set in TRDGRB0 register

p: Value set in TRDGRA1 register

q: Value set in TRDGRB1 register

Active level “L”

Set to 0 by a program

TRDIOB0 output

IMFA bit in

TRDSR0 register

IMFB bit in

TRDSR0 register

IMFA bit in

TRDSR1 register

IMFB bit in

TRDSR1 register

TSTARTi bit in

TRDSTR register

n+1

TRDIOC1 output

TRDIOA1 output

m-q

m-p

TRDIOB1 output

TRDIOC0 output

p+1

Initial output “H”

i = 0 or 1

The above applies under the following conditions:

Bits OLS1 and OLS0 in the TRDFCR register are set to 0 (initial output level “H”, active level “L”).

0000h

Set to 0 by a program

Transfer from the buffer register to the

general register during buffer operation

Transfer from the buffer register to the

general register during buffer operation

q+1

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