AFE5804 datasheet(5/60 Pages) TI

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AFE5804

www.ti.com ................................................................................................................................................ SBOS442A – JUNE 2008 – REVISED SEPTEMBER 2008

ELECTRICAL CHARACTERISTICS (continued)

At AVDD_5V = 5.0V, AVDD1 = AVDD2 = DVDD = 3.3V, LVDD = 1.8V, TGC mode I, single-ended input into LNA, ac-coupled

(1.0

µF), V

CNTL = 1.0V, fIN = 5MHz, Clock = 40MSPS, 50% duty cycle, LPF = 12.5MHz, internal reference mode, ISET = 56kΩ,

LVDS buffer setting = 3.5mA, and ambient temperature TA = +25°C, unless otherwise noted.

AFE5804

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

EXTERNAL REFERENCE VOLTAGES (ADC)

Reference top

VREFT

2.4

2.5

2.6

Reference bottom

VREFB

0.4

0.5

0.6

VREFT – VREFB

1.9

2.1

Switching current(4)

2.5

POWER SUPPLY

SUPPLY VOLTAGES

At 40MSPS

AVDD1, AVDD2, DVDD

Operating

3.15

3.3

3.47

AVDD_5V

Operating

4.75

5.25

LVDD

1.7

1.8

1.9

SUPPLY CURRENTS

IAVDD1 (ADC)

110

TGC mode I

123

136

IAVDD2 (VCA)

CW mode

TGC mode I

IAVDD_5V (VCA)

CW mode

IDVDD (VCA)

1.5

3.0

ILVDD (ADC)

All channels, TGC mode I, no signal

896

985

All channels, TGC mode II, no signal

808

898

Power dissipation, total(5)

All channels, PW mode , no signal

840

925

All channels, CW mode, no signal(6)

525

575

No clock applied, no signal

528

POWER-DOWN MODES

Power-down dissipation, total

Complete power-down mode

Power-down response time

1.0

µs

Power-up response time

PD to valid output (90% level)

µs

Power-down dissipation(7)

Partial power-down mode

THERMAL CHARACTERISTICS

Temperature range

°C

Thermal resistance, TJA

°C/W

Thermal resistance, TJC

4.2

°C/W

(4)

Current drawn by the eight ADC channels from the external reference voltages; sourcing for VREFT, sinking for VREFB.

(5)

Programmable power affects on the front-end; ADC power consumption remains constant at about 57mW/channel for 40MSPS.

(6)

ADC powered-down during CW mode.

(7)

At VCA_PD pin pulled high; see also Power-Down Timing diagram.

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