M32CSLASH8B datasheet(329/406 Pages) RENESAS

329 / 406 page

Under development

M32C/8B Group

23. Flash Memory

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 312 of 385

(3) Clear Status Register Command

The clear status register command is used to clear the Status Register. When the command code xx50h is

written in the first bus cycle, bits FMR07 and FMR06 in the FMR0 register become 00b and bits SR5 and SR4

in the Status Register become 00b.

(4) Program Command

The program command is used to write data to the flash memory in 4-byte units.

A program operation (program and verify data) starts by writing the command code xx41h in the first bus cycle,

and data to the 16 low-order bits of write address in the second bus cycle and to the 16 high-order bits of write

address in the third bus cycle. The address value specified in the first bus cycle must be the same even address

as the 16 low-order bits of write address specified in the second bus cycle. Specify the 16 low-order bits of write

address and the 16 high-order bits of write address in the consecutive even addresses.

The FMR00 bit in the FMR0 register can be used to determine whether a program operation has been

completed or not. The FMR00 bit becomes 0 (busy) during the program operation and becomes 1 (ready) when

the program operation is completed.

After a program operation is completed, the FMR06 bit in the FMR0 register is used to determine whether a

program operation is completed successfully or not. (Refer to 23.6.1.3 Error Check for details.)

Do not execute the program command to the same address more than once without executing the block erase

command. Figure 23.9 shows a flow chart of the program command.

The lock bit can protect each block from being programmed inadvertently. (Refer to 23.3.1 Lock bit Protect

Function for details.)

In EW1 mode, do not execute this command to the block where the rewrite control program is stored.

In EW0 mode, the flash memory enters read status register mode when a program operation starts.

Figure 23.9

Program Command

Start

End

Error check

FMR00 = 1?

YES

Write the command code xx41h to the 16 low-order

bits of write address

Write 16 low-order bits of write data to the 16 low-

order bits of write address

Write 16 high-order bits of write data to the 16 high-

order bits of write address

Write the command code and data in the even address.

Specify the 16 low-order bits of write address and the 16

high-order bits of write address in the consecutive even

addresses.

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