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M32C/8B 데이터시트(PDF) 395 Page - Renesas Technology Corp |
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M32C/8B 데이터시트(HTML) 395 Page - Renesas Technology Corp |
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395 / 406 page ![]() Under development M32C/8B Group 25. Usage Notes Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 378 of 385 25.12 A/D Converter • Set the ADST bit to 1 (A/D conversion starts) after setting registers AD0CON0 (ADST bit excluded), AD0CON1, AD0CON2, AD0CON3, and AD0CON4. • When the VCUT bit in the AD0CON1 register is changed from 0 (VREF not connected) to 1 (VREF connected), wait for 1 μs or more to start A/D conversion. Set the VCUT bit to 0 when A/D conversion is not used to reduce current consumption. •To prevent latch-up and malfunction due to noise and also to minimize a conversion error, insert a capacitor between the AVSS pin and each of the following pins: the AVCC pin, VREF pin, or analog input pin ANi_j (i = none, 0, 2, 15; j = 0 to 7). Insert a capacitor between the VCC pin and the VSS pin as well. Figure 25.4 shows an example of individual pin handling. Figure 25.4 Individual Pin Handling • Set the port direction bit in the PDk register (k = 0 to 15), which corresponds to a pin used as an analog input pin, to 0 (input mode). Also, set the port direction bit in the PDk register corresponding to the ADTRG pin, to 0 (input mode.) • When the key input interrupt is used, do not select pins P10_4 to P10_7 (AN_4 to AN_7) as analog input pins. • φAD frequency must be 16 MHz or lower when VCC1 = 4.2 V to 5.5 V, or 10 MHz or lower when VCC1 = 3.0 V to 5.5 V. When the sample and hold is not activated, φAD frequency must be 250 kHz or higher. When the sample and hold is activated, φAD frequency must be 1 MHz or higher. • When A/D operating mode is changed, set bits CH2 to CH0 in the AD0CON0 register or bits SCAN1 and SCAN0 in the AD0CON1 register again to select analog input pins. • The voltage applied to AN_0 to AN_7, AN15_0 to AN15_7, ANEX0, and ANEX1 must be VCC1 or below. The voltage applied to AN0_0 to AN0_7, and AN2_0 to AN2_7 must be VCC2 or below. VCC1 VSS AVCC AVSS VREF ANi C4 C1 C2 C3 MCU NOTES: 1. C1 ≥ 0.47 μF, C2 ≥ 0.47 μF, C3 ≥ 10000 pF, C4 ≥ 0.1 μF, C5 ≥ 0.1 μF (reference values) 2. Use thick and shortest possible wiring to connect capacitors. VCC2 VSS C5 VCC1 VCC2 VCC1 |
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