H8S2245 datasheet(753/818 Pages) RENESAS

753 / 818 page

Appendix B Register Field

Rev.3.00 Mar. 26, 2007 Page 711 of 772

REJ09B0355-0300

TCR0—Timer Control Register 0

H'FFD0

TPU0

CCLR2

R/W

CCLR1

R/W

CCLR0

R/W

CKEG1

R/W

CKEG0

R/W

TPSC0

R/W

TPSC2

R/W

TPSC1

R/W

TCNT clearing disabled

TCNT cleared by TGRA compare match/input capture

TCNT cleared by TGRB compare match/input capture

Counter Clear

Clock Edge

—

Count at rising edge

Count at falling edge

Count at both edges

Internal clock: counts on

φ/1

Internal clock: counts on

φ/4

Internal clock: counts on

φ/16

Internal clock: counts on

φ/64

External clock: counts on TCLKA pin input

External clock: counts on TCLKB pin input

External clock: counts on TCLKC pin input

External clock: counts on TCLKD pin input

Time Prescaler

Bit

Initial value

Read/Write

TCNT cleared by counter clearing for another channel

performing synchronous clearing/synchronous operation

TCNT cleared by counter clearing for another channel

performing synchronous clearing/synchronous operation

TCNT clearing disabled

TCNT cleared by TGRC compare match/input capture

TCNT cleared by TGRD compare match/input capture

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