HD6432351 datasheet(592/1025 Pages) RENESAS

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Section 13 Serial Communication Interface (SCI)

Rev. 3.00 Sep 15, 2006 page 558 of 988

REJ09B0330-0300

Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits are used to select the SCI clock

source and enable or disable clock output from the SCK pin. The combination of the CKE1 and

CKE0 bits determines whether the SCK pin functions as an I/O port, the serial clock output pin, or

the serial clock input pin.

The setting of the CKE0 bit, however, is only valid for internal clock operation (CKE1 = 0) in

asynchronous mode. The CKE0 bit setting is invalid in clocked synchronous mode, and in the case

of external clock operation (CKE1 = 1). Note that the SCI’s operating mode must be decided using

SMR before setting the CKE1 and CKE0 bits.

For details of clock source selection, see table 13.9.

Bit 1

CKE1

Bit 0

CKE0

Description

Asynchronous mode

Internal clock/SCK pin functions as I/O port*

Clocked synchronous

mode

Internal clock/SCK pin functions as serial clock

output

Asynchronous mode

Internal clock/SCK pin functions as clock output*

Clocked synchronous

mode

Internal clock/SCK pin functions as serial clock

output

Asynchronous mode

External clock/SCK pin functions as clock input*

Clocked synchronous

mode

External clock/SCK pin functions as serial clock

input

Asynchronous mode

External clock/SCK pin functions as clock input*

Clocked synchronous

mode

External clock/SCK pin functions as serial clock

input

Notes: 1. Initial value

2. Outputs a clock of the same frequency as the bit rate.

3. Inputs a clock with a frequency 16 times the bit rate.

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