HD6432351 datasheet(722/1025 Pages) RENESAS

722 / 1025 page

Section 20 Power-Down Modes

Rev. 3.00 Sep 15, 2006 page 688 of 988

REJ09B0330-0300

Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the time the MCU

waits for the clock to stabilize when software standby mode is cleared by an external interrupt.

With crystal oscillation, refer to table 20.4 and make a selection according to the operating

frequency so that the standby time is at least 8 ms (the oscillation stabilization time). With an

external clock, any selection can be made.

Bit 6

STS2

Bit 5

STS1

Bit 4

STS0

Description

Standby time = 8192 states

(Initial value)

Standby time = 16384 states

Standby time = 32768 states

Standby time = 65536 states

Standby time = 131072 states

Standby time = 262144 states

Reserved

Standby time = 16 states

Bit 3—Output Port Enable (OPE): Specifies whether the output of the address bus and bus

control signals (

CS0 to CS7, AS, RD, HWR, LWR, CAS) is retained or set to the high-impedance

state in software standby mode.

Bit 3

OPE

Description

In software standby mode, address bus and bus control signals are high-impedance

In software standby mode, address bus and bus control signals retain output state

(Initial value)

Bits 2 and 1—Reserved: Read-only bits, always read as 0.

Bit 0—Reserved: This bit can be read or written to, but only 0 should be written.

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