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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HD6432351 데이터시트(PDF) 835 Page - Renesas Technology Corp |
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HD6432351 데이터시트(HTML) 835 Page - Renesas Technology Corp |
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835 / 1025 page  Appendix A Instruction Set Rev. 3.00 Sep 15, 2006 page 801 of 988 REJ09B0330-0300 A.6 Condition Code Modification This section indicates the effect of each CPU instruction on the condition code. The notation used in the table is defined below. m = 31 for longword operands 15 for word operands 7 for byte operands Si Di Ri Dn — 0 1 * Z' C' The i-th bit of the source operand The i-th bit of the destination operand The i-th bit of the result The specified bit in the destination operand Not affected Modified according to the result of the instruction (see definition) Always cleared to 0 Always set to 1 Undetermined (no guaranteed value) Z flag before instruction execution C flag before instruction execution |
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