HD6432351 datasheet(121/1025 Pages) RENESAS

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HD6432351 데이터시트(PDF) 121 Page - Renesas Technology Corp

부품명	HD6432351

상세설명	16-Bit Single-Chip Microcomputer

PDF	1025 Pages

Scroll/Zoom	100%

제조업체	RENESAS [Renesas Technology Corp]

홈페이지	http://www.renesas.com

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121 / 1025 page

Section 4 Exception Handling

Rev. 3.00 Sep 15, 2006 page 87 of 988

REJ09B0330-0300

4.5

Trap Instruction

Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction

exception handling can be executed at all times in the program execution state.

The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector

number from 0 to 3, as specified in the instruction code.

Table 4.5 shows the status of CCR and EXR after execution of trap instruction exception handling.

Table 4.5

Status of CCR and EXR after Trap Instruction Exception Handling

CCR

EXR

Interrupt Control Mode

I2 to I0

—

Legend:

1: Set to 1

0: Cleared to 0

—: Retains value prior to execution.

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