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HD64F2149YV 데이터시트(PDF) 470 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 470 Page - Renesas Technology Corp |
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470 / 1075 page ![]() Section 15 Serial Communication Interface (SCI, IrDA) Rev. 3.00 Jan 18, 2006 page 442 of 1044 REJ09B0280-0300 Bit 1—Multiprocessor Bit (MPB): When reception is performed using a multiprocessor format in asynchronous mode, MPB stores the multiprocessor bit in the receive data. MPB is a read-only bit, and cannot be modified. Bit 1 MPB Description 0 [Clearing condition] (Initial value)* When data with a 0 multiprocessor bit is received 1 [Setting condition] When data with a 1 multiprocessor bit is received Note: * Retains its previous state when the RE bit in SCR is cleared to 0 with multiprocessor format. Bit 0—Multiprocessor Bit Transfer (MPBT): When transmission is performed using a multiprocessor format in asynchronous mode, MPBT stores the multiprocessor bit to be added to the transmit data. The MPBT bit setting is invalid when a multiprocessor format is not used, when not transmitting, and in synchronous mode. Bit 0 MPBT Description 0 Data with a 0 multiprocessor bit is transmitted (Initial value) 1 Data with a 1 multiprocessor bit is transmitted |
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