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HD64F2149YV 데이터시트(PDF) 487 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 487 Page - Renesas Technology Corp |
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487 / 1075 page ![]() Section 15 Serial Communication Interface (SCI, IrDA) Rev. 3.00 Jan 18, 2006 page 459 of 1044 REJ09B0280-0300 Figure 15.4 shows a sample SCI initialization flowchart. Wait <Initialization completed> Start initialization Set data transfer format in SMR and SCMR [1] Set CKE1 and CKE0 bits in SCR (TE, RE bits 0) No Yes Set value in BRR Clear TE and RE bits in SCR to 0 [2] [3] Set TE and RE bits in SCR to 1, and set RIE, TIE, TEIE, and MPIE bits [4] 1-bit interval elapsed? [1] Set the clock selection in SCR. Be sure to clear bits RIE, TIE, TEIE, and MPIE, and bits TE and RE, to 0. When the clock is selected in asynchronous mode, it is output immediately after SCR settings are made. [2] Set the data transfer format in SMR and SCMR. [3] Write a value corresponding to the bit rate to BRR. This is not necessary if an external clock is used. [4] Wait at least one bit interval, then set the TE bit or RE bit in SCR to 1. Also set the RIE, TIE, TEIE, and MPIE bits. Setting the TE and RE bits enables the TxD and RxD pins to be used. Figure 15.4 Sample SCI Initialization Flowchart |
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