전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

HD64F2149YV 데이터시트(PDF) 494 Page - Renesas Technology Corp

부품명 HD64F2149YV
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV 데이터시트(HTML) 494 Page - Renesas Technology Corp

Back Button HD64F2149YV Datasheet HTML 490Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 491Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 492Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 493Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 494Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 495Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 496Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 497Page - Renesas Technology Corp HD64F2149YV Datasheet HTML 498Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 494 / 1075 page
background image
Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 3.00 Jan 18, 2006 page 466 of 1044
REJ09B0280-0300
Table 15.11 Receive Errors and Conditions for Occurrence
Receive Error
Abbreviation
Occurrence Condition
Data Transfer
Overrun error
ORER
When the next data reception is
completed while the RDRF flag
in SSR is set to 1
Receive data is not
transferred from RSR to
RDR
Framing error
FER
When the stop bit is 0
Receive data is transferred
from RSR to RDR
Parity error
PER
When the received data differs
from the parity (even or odd) set
in SMR
Receive data is transferred
from RSR to RDR
Figure 15.8 shows an example of the operation for reception in asynchronous mode.
RDRF
FER
0
1 frame
D0
D1
D7
0/1
1
0
D0
D1
D7
0/1
0
1
1
Data
Start
bit
Parity
bit
Stop
bit
Start
bit
Data
Parity
bit
Stop
bit
RXI interrupt
request
generated
ERI interrupt request
generated by framing
error
Idle state
(mark state)
RDR data read and RDRF
flag cleared to 0 in RXI
interrupt handling routine
Figure 15.8 Example of SCI Operation in Reception
(Example with 8-Bit Data, Parity, One Stop Bit)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com