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HD64F2149YV 데이터시트(PDF) 656 Page - Renesas Technology Corp

부품명 HD64F2149YV
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV 데이터시트(HTML) 656 Page - Renesas Technology Corp

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Section 18B Host Interface LPC Interface (LPC)
Rev. 3.00 Jan 18, 2006 page 628 of 1044
REJ09B0280-0300
SIRQCR0 Bit 4—SMI Interrupt Enable 3B (SMIE3B): Enables or disables a SMI interrupt
request when OBF3B is set by a TWR15 write.
Bit 4
SMIE3B
Description
0
SMI interrupt request by OBF3B and SMIE3B is disabled
(Initial value)
[Clearing conditions]
• Writing 0 to SMIE3B
• LPC hardware reset, LPC software reset
• Clearing OBF3B to 0 (when IEDIR = 0)
1
[When IEDIR = 0]
SMI interrupt request by setting OBF3B to 1 is enabled
[When IEDIR = 1]
SMI interrupt is requested
[Setting condition]
• Writing 1 after reading SMIE3B = 0
SIRQCR0 Bit 3—SMI Interrupt Enable 3A (SMIE3A): Enables or disables a SMI interrupt
request when OBF3A is set by an ODR3 write.
Bit 3
SMIE3A
Description
0
SMI interrupt request by OBF3A and SMIE3A is disabled
(Initial value)
[Clearing conditions]
• Writing 0 to SMIE3A
• LPC hardware reset, LPC software reset
• Clearing OBF3A to 0 (when IEDIR = 0)
1
[When IEDIR = 0]
SMI interrupt request by setting OBF3A to 1 is enabled
[When IEDIR = 1]
SMI interrupt is requested
[Setting condition]
• Writing 1 after reading SMIE3A = 0



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