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HD64F2149YV 데이터시트(PDF) 659 Page - Renesas Technology Corp

부품명 HD64F2149YV
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV 데이터시트(HTML) 659 Page - Renesas Technology Corp

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Section 18B Host Interface LPC Interface (LPC)
Rev. 3.00 Jan 18, 2006 page 631 of 1044
REJ09B0280-0300
SIRQCR0 Bit 2—SMI Interrupt Enable 2 (SMIE2): Enables or disables a SMI interrupt
request when OBF2 is set by an ODR2 write.
Bit 2
SMIE2
Description
0
SMI interrupt request by OBF2 and SMIE2 is disabled
(Initial value)
[Clearing conditions]
• Writing 0 to SMIE2
• LPC hardware reset, LPC software reset
• Clearing OBF2 to 0 (when IEDIR = 0)
1
[When IEDIR = 0]
SMI interrupt request by setting OBF2 to 1 is enabled
[When IEDIR = 1]
SMI interrupt is requested
[Setting condition]
• Writing 1 after reading SMIE2 = 0
SIRQCR1 Bit 3—HIRQ11 Interrupt Enable 2 (IRQ11E2): Enables or disables a HIRQ11
interrupt request when OBF2 is set by an ODR2 write.
Bit 3
IRQ11E2
Description
0
HIRQ11 interrupt request by OBF2 and IRQ11E2 is disabled
(Initial value)
[Clearing conditions]
• Writing 0 to IRQ11E2
• LPC hardware reset, LPC software reset
• Clearing OBF2 to 0 (when IEDIR = 0)
1
[When IEDIR = 0]
HIRQ11 interrupt request by setting OBF2 to 1 is enabled
[When IEDIR = 1]
HIRQ11 interrupt is requested
[Setting condition]
• Writing 1 after reading IRQ11E2 = 0



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