HD64F2149YV datasheet(675/1075 Pages) RENESAS

부품명	HD64F2149YV

상세설명	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

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제조업체	RENESAS [Renesas Technology Corp]

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Section 18B Host Interface LPC Interface (LPC)

Rev. 3.00 Jan 18, 2006 page 647 of 1044

REJ09B0280-0300

clock must first be issued to the host. For details see section 18B.3.6, Host Interface Clock Start

Request (CLKRUN).

18B.3.6 Host Interface Clock Start Request (CLKRUN)

A request to restart the clock (LCLK) can be sent to the host processor by means of the

CLKRUN

pin. With LPC data transfer and SERIRQ in continuous mode, a clock restart is never requested

since the transfer cycles are initiated by the host. With SERIRQ in quiet mode, when a host

interrupt request is generated the

CLKRUN signal is driven and a clock (LCLK) restart request is

sent to the host. The timing for this operation is shown in figure 18B.7.

CLK

CLKRUN

Pull-up enable

Drive by the host processor

Drive by the slave processor

Figure 18B.7 Clock Start or Speed-Up

Cases other than SERIRQ in quiet mode when clock restart is required must be handled with a

different protocol, using the

PME signal, etc.

HD64F2149YV 데이터시트(PDF) 675 Page - Renesas Technology Corp