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HD64F2149YV 데이터시트(PDF) 920 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 920 Page - Renesas Technology Corp |
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920 / 1075 page ![]() Appendix B Internal I/O Registers Rev. 3.00 Jan 18, 2006 page 892 of 1044 REJ09B0280-0300 Lower Address Register Name H8S/2149 Register Selection Conditions H8S/2169 Register Selection Conditions Module Name H'FFFC IDR2 MSTP2 = 0, HIE = 1 in SYSCR ← HIF:XBS TCONRI MSTP8 = 0, HIE = 0 in SYSCR ← Timer connection H'FFFD ODR2 MSTP2 = 0, HIE = 1 in SYSCR ← HIF:XBS TCONRO MSTP8 = 0, HIE = 0 in SYSCR ← Timer connection H'FFFE STR2 MSTP2 = 0, HIE = 1 in SYSCR ← HIF:XBS TCONRS ← Timer connection H'FFFF SEDGR MSTP8 = 0, HIE = 0 in SYSCR Note: * The settings of HIF:XBS related bits do not affect the operation of the HIF:LPC. However, for reasons relating to the configuration of the program development tool (emulator), when the HIF:LPC is used, bit HI12E in SYSCR2 should not be set to 1. |
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