HD64F2149YV datasheet(245/1075 Pages) RENESAS

245 / 1075 page

Section 8 I/O Ports

Rev. 3.00 Jan 18, 2006 page 217 of 1044

REJ09B0280-0300

8.4.2

Table 8.6 shows the port 3 register configuration.

Table 8.6

Port 3 Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port 3 data direction register

P3DDR

H'00

H'FFB4

Port 3 data register

P3DR

R/W

H'00

H'FFB6

Port 3 MOS pull-up control

P3PCR

R/W

H'00

H'FFAE

Note:

Lower 16 bits of the address.

Port 3 Data Direction Register (P3DDR)

P37DDR

P36DDR

P35DDR

P34DDR

P33DDR

P30DDR

P32DDR

P31DDR

Bit

Initial value

Read/Write

P3DDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port 3. P3DDR cannot be read; if it is, an undefined value will be returned.

P3DDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in

software standby mode.

• Mode 1, modes 2 and 3 (EXPE = 1)

The input/output direction specified by P3DDR is ignored, and pins automatically function as

data I/O pins.

After a reset, and in hardware standby mode or software standby mode, the data I/O pins go to

the high-impedance state.

• Modes 2 and 3 (EXPE = 0)

The corresponding port 3 pins are output ports when P3DDR bits are set to 1, and input ports

when cleared to 0.

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